Your search returned
20
records. Click on the hyperlinks to view further details of Titles..
Magazine Name
:
Ieee Journal Of Solid-State Circuits
Year :
2003
Volume number :
38
Issue:
05
A 4-Ghz 130-Nm Address Generation Unit With 32-Bit Sparse-Tree Adder Core
(Article)
Subject
:
Address Generation
Author:
Sanu Mathew
page:
689 -
695
Forward Body Bias For Microprocessors In 130-Nm Technology Generation And Beyond
(Article)
Subject
:
Forward Body Bias
Author:
Siva Narendra
page:
696 -
701
Crosstalk Delay Analysis Of A 0.13-Um Node Test Chip And Precise Gate-Level Simulation Technology
(Article)
Subject
:
Crosstalk , Delay Calculation
Author:
Yasuhiko Saski
page:
702 -
708
A Transition-Encoded Dynamic Bus Technique For High-Performance Interconnects
(Article)
Subject
:
Coupling Capacitance , Dynamic Circuits
Author:
Mark A Anders Nivruti Rai
page:
709 -
714
A Ferroelectric Memory-Based Secure Dynamically Programmable Gate Array
(Article)
Subject
:
Ferroelectric Storage
Author:
Stoichi Masui T Ninomiya
page:
715 -
725
A Still-Image Encoder Based On Adaptive Resolution Vector Quantization Featuring Needless Calsulation Elimination Architecture
(Article)
Subject
:
High-Resolution Radar
Author:
Masanori Fujibayashi
page:
726 -
733
A 300-Ms/S Digital -To-Analog Converter In Logic Cmos
(Article)
Subject
:
Digital-To-Analog Converter
Author:
John Hyde Todd Humes
page:
735 -
740
A 0.13-Um Cmos 5-Gb/S 10-M 28awg Cable Transceiver With No-Feedback-Loop Continous-Time Post-Equalizer
(Article)
Subject
:
Amplifier , Cmos
Author:
Yoshiharu Kudoh Muneo Pukaishi
page:
741 -
754
A 4.5-Ghz 130-Nm 32-Kb Lo Cache With A Leakasge -Tollerant Self Reverse-Bias Bitline Scheme
(Article)
Subject
:
Bitline , Cmos
Author:
Steven Hsu
page:
755 -
761
A1-Gd/S/Pin 512-Mb Ddrii Sdram Uaing A Digital Dll And A Slew -Rate-Controlled Output Buffer
(Article)
Subject
:
Delay-Locked Loop
Author:
Tatsuya Matano
page:
762 -
768
A 1-Mit Mram Based On Itimtj Bit Cell Intregated With Copper Interconnects
(Article)
Subject
:
Magnetic Tunnel Junction
Author:
Mark Durlan Peter J Naji
page:
769 -
773
A Higly Integrated Analog Front-End For 3g
(Article)
Subject
:
Active Rc Filter
Author:
Waleed Khalil
page:
774 -
781
A 17-Mw Transmitter And Frequency Synthesizer For 900-Mhz Gsm Fully Integrated In 0.35 -Um Cmos
(Article)
Subject
:
Constant Envelope
Author:
Emad Hegavi
page:
782 -
792
A Low-Power 200-Mhz Receiver For Wireless Hearing Aid Devices
(Article)
Subject
:
Bessel Filter
Author:
Armin Deiss
page:
793 -
804
A 1-V 3.5 -Mw Cmos Switched -Opamp Quadrature If Circuitry For Bluetooth Receivers
(Article)
Subject
:
Analog-To-Digital Conversion
Author:
Sin-Luen Cheung
page:
805 -
816
A 1.8-V Operation Rf Cmos Transceiver For 2.4-Ghz-Band Gfsk Applications
(Article)
Subject
:
Cmos , Low Voltage
Author:
Hiroshi Komurasaki
page:
817 -
825
Effectiveness Of Adaptive Supply Voltage And Body Bias For Reducing Impact Of Parameter Variations In ;Low Power And High Performance Microprocessors
(Article)
Subject
:
Body Bias , Cmos
Author:
Georgia Tech
page:
826 -
829
Threshold -Voltage Balance For Minimum Supply Operation
(Article)
Subject
:
Body Bias , Fluctuations
Author:
Goichi Ono
page:
830 -
833
Near Speed -Of-Signaling Over On-Chip Electrical Interconnects
(Article)
Subject
:
Integrated Circuit , Microstrip Antenna
Author:
Richard T. Chang
page:
834 -
838
A 6-Ghz 16-Kb Li Cache In A 100-Mn Dual-Vt Technologyusing A Bitline Leakage Reduction (Blr) Technique
(Article)
Subject
:
Bitline , Cell Array Architecture
Author:
Y Ye
page:
839 -
842
